Gen 3.2 BIG POWER MOSFET SWITCH
- General Microservers, Vexcel Microservers, Quick Reference, Data Acquisition, Middleware
- Components GPS, SBC
- Configuration Microserver, SBC, SD Card, Power
- Operation Communication Protocol (SBC <--> uc), SBC Operations, Agent
- Operation (background) Task Manager "milo", config files, MACRO
- Microcontroller Microcontroller, Firmware, Skeleton firmware
- Evaluation 2008 Cairn relay failure evaluation, Lab evaluation, Eval-Firmware, BPMS, Source notes
- PCS Board PCS Board Design, Voltage Monitoring Circuit
- Gen 3.1 Kernel Upgrade and Field Notes (Spring 2007)
- Gen 3.1 Microserver, README, Schematics
- Gen 3.1 Task Manager "milo", GPS, Firmware
This page describes an additional part needed for low-power operation of the Vexcel Microserver, Gen 3.2. The device is simple and cheap and takes advantage of some unused functionality in the microcontroller. It will turn off a vampire drain on the external battery (actually reduce it to 100 microamps) when the device is in hibernation mode. For reference diagrams refer to the Gen 3.2 evaluation page.
Statement of problem
The External Battery connects to the chassis or bulkhead by means of a 3-pin milspec connector. Inside the + and Gd wires run directly to a SunSaver 6 charge controller, to the "Battery" terminals. From the SunSaver6 (henceforth SS6) the Load terminals connect to a Voltage Regulator (VReg) which provides a stable 12V supply to the PCS board by means of PCS connect JP3. Furthermore the (optional) external PV suppy connects to the SS6 via a separate chassis connector.
When the voltage from the PV sufficiently exceeds the battery voltage, current is directed back to the battery by the SS6 to recharge it.
The problem is twofold:
1. In series the SS6 and VReg draw 35 milliamps of current which (at 12V) comes to about 0.45 watts. This will always be the case, particularly even when the device is hibernating. In low-light conditions this will burn the battery down to non-operation voltage.
2. Placing a switch in the circuit to disable the input battery voltage will also disable the re-charge functionality.
Solution to problem
We use the PIC microcontroller on the PCS board to turn power supplies on and off. Fortunately there are two spare DIO lines, so we can appropriate one of these, route it to a PCS board header pin, build a cable from this pin to an off-board MOSFET, and mount this as a new assembly directly above the VReg. The Gen 3.2 enclosure has spare room to accommodate just this sort of thing.
The MOSFET when not biased will act as a high-impedence resistor, leaking only 55--155 microamps of current. The problem of course is that it sits between the external battery and the charge controller (SS6). This means the PV panels would never be able to re-charge the battery. No problem: We can add a diode that lets current go back to the battery circumventing the MOSFET "when it is sunny out". As we remarked in the diode-gizmo remarks, the rule of thumb for a diode is that it requires a bias of around 0.7 volts to activate.
The circuit we're adding here will still draw some vampire current from the external battery but now only 55--155 microamps instead of 35 milliamps through the MOSFET and probably a comparable amount of leakage current through the diode. In the worst case however it is still quite tolerable: The passive power drain is only around 4 milliwatts. The other penalty we pay is that the battery recharge circuit will lose 0.7 volts across the diode so presumably recharging will not be as effective.
The part we will use is produced by Microchip, called the TC4421/TC4422. We choose the TC4422 since the logic-to-supply polarity is matched (not reversed) so that the microcontroller (henceforth uC or uc) can be hibernated and will shut the external battery connection off. A quick internet search on TC4422 will turn up the datasheet listing which in turn leads to this pdf file: http://ww1.microchip.com/downloads/en/DeviceDoc/21420d.pdf.
The package we choose is the TO-220 form, the standard tab form which is easiest to build to. The device can pass through up to 9 amps of current and has the following geometric form:
Facing front of package TC4422, TO-220 ------------------- | | | /\ | | \/ | | | ------------------- | | | | | | | | | | ------------------- | | | | | | | | | | | | | | | | | | | | | | | |-||-| 10nF capacitor: Output to Gd | | | | | I G V G O Pin: 1 2 3 4 5 | | | | | | | | | | ---|<|--- Diode Negative Term connects to MOSFET Pin 3, Positive Pin 5 | | IR 90SQ035 0715R P0405 -RR- Resistor 15kohm
- Pin 1 I is Input control signal, i.e. our DIO signal (+4.8V or Gd on uC RB2=A/GP-1)
- Pin 2 G is Ground, tied to pin 4 and connected to VReg output Gd == PCS Gd
- Pin 3 V is Vdd, the supply voltage from the chassis connector, i.e. from Ext Battery
- Pin 4 G is Ground tied to Pin 2
- Pin 5 O is Output, i.e. the pass-through supply from the Ext Batt to the SS6 Battery positive screw terminal
- Diode (below) will connect Pin 3 to Pin 5 to provide a back-wash charging pathway (at a loss of 0.4V)
- Resistor 15kohm will draw 0.3 milliamps (1.4milliwatts) when the system is active. In sleep mode it serves (pulldown) to keep the MOSFET grounded/OFF.
This diode: 90SQ035 fits the bill. The Digikey product page is at http://search.digikey.com/scripts/DkSearch/dksus.dll?Detail?name=90SQ035-ND and the Datasheet may uploaded from http://rocky.digikey.com/scripts/ProductInfo.dll?Site=US&V=698&M=90SQ035 .
- The device will mount in a small piece of perf-board with a means of mounting over the Vreg
- A heat sink will be needed
- The five leads will go through the perf board to wires with heat-shrink insulation
- A 10kohm pulldown resistor will be needed (check numbers) to drag the I signal to Gd when the PIC is in Sleep
- The DIO line will go Hi to turn the part on which selects the TC4422
- Four cables corresponding to 4 connections on the BPMS board
- 1. Ground cable from VReg Output Ground terminal (hits MOSFET pins 2 and 4)
- 2. + Voltage from bulkhead External Power to MOSFET Pin 3
- 3. + Voltage to SunSaver 6 charge controller Batt + to MOSFET Pin 5
- 4. DIO from PCS J3 Pin 1 (south-most) to MOSFET Input Pin 1
- BPMS Board
- Pulldown resistor 10kohm Pin 1 to Pin 2 (INPUT to Gd)
- Heat sink attached to back tab
- back tab + heat sink are an extension of Pin 3 (Vdd); must be insulated
- perf board mount attaches mechanically above VReg